mirror of
https://github.com/jonathanhogg/scopething
synced 2025-07-14 03:02:09 +01:00
Large part of capture working
This commit is contained in:
Jonathan Hogg
283
vm.py
283
vm.py
@ -3,83 +3,80 @@ import asyncio
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import numpy as np
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import struct
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Registers = {
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"vrTriggerLogic": (0x05, 'U8', "Trigger Logic, one bit per channel (0 => Low, 1 => High)"),
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"vrTriggerMask": (0x06, 'U8', "Trigger Mask, one bit per channel (0 => Don’t Care, 1 => Active)"),
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"vrSpockOption": (0x07, 'U8', "Spock Option Register (see bit definition table for details)"),
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"vrSampleAddress": (0x08, 'U24', "Sample address (write) 24 bit"),
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"vrSampleCounter": (0x0b, 'U24', "Sample address (read) 24 bit"),
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"vrTriggerIntro": (0x32, 'U24', "Edge trigger intro filter counter (samples/2)"),
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"vrTriggerOutro": (0x34, 'U16', "Edge trigger outro filter counter (samples/2)"),
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"vrTriggerValue": (0x44, 'S16', "Digital (comparator) trigger (signed)"),
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"vrTriggerTime": (0x40, 'U32', "Stopwatch trigger time (ticks)"),
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"vrClockTicks": (0x2e, 'U16', "Master Sample (clock) period (ticks)"),
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"vrClockScale": (0x14, 'U16', "Clock divide by N (low byte)"),
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"vrTraceOption": (0x20, 'U8', "Trace Mode Option bits"),
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"vrTraceMode": (0x21, 'U8', "Trace Mode (see Trace Mode Table)"),
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"vrTraceIntro": (0x26, 'U16', "Pre-trigger capture count (samples)"),
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"vrTraceDelay": (0x22, 'U32', "Delay period (uS)"),
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"vrTraceOutro": (0x2a, 'U16', "Post-trigger capture count (samples)"),
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"vrTimeout": (0x2c, 'U16', "Auto trace timeout (auto-ticks)"),
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"vrPrelude": (0x3a, 'U16', "Buffer prefill value"),
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"vrBufferMode": (0x31, 'U8', "Buffer mode"),
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"vrDumpMode": (0x1e, 'U8', "Dump mode"),
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"vrDumpChan": (0x30, 'U8', "Dump (buffer) Channel (0..127,128..254,255)"),
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"vrDumpSend": (0x18, 'U16', "Dump send (samples)"),
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"vrDumpSkip": (0x1a, 'U16', "Dump skip (samples)"),
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"vrDumpCount": (0x1c, 'U16', "Dump size (samples)"),
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"vrDumpRepeat": (0x16, 'U16', "Dump repeat (iterations)"),
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"vrStreamIdent": (0x36, 'U8', "Stream data token"),
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"vrStampIdent": (0x3c, 'U8', "Timestamp token"),
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"vrAnalogEnable": (0x37, 'U8', "Analog channel enable (bitmap)"),
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"vrDigitalEnable": (0x38, 'U8', "Digital channel enable (bitmap)"),
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"vrSnoopEnable": (0x39, 'U8', "Frequency (snoop) channel enable (bitmap)"),
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"vpCmd": (0x46, 'U8', "Command Vector"),
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"vpMode": (0x47, 'U8', "Operation Mode (per command)"),
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"vpOption": (0x48, 'U16', "Command Option (bits fields per command)"),
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"vpSize": (0x4a, 'U16', "Operation (unit/block) size"),
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"vpIndex": (0x4c, 'U16', "Operation index (eg, P Memory Page)"),
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"vpAddress": (0x4e, 'U16', "General purpose address"),
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"vpClock": (0x50, 'U16', "Sample (clock) period (ticks)"),
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"vpModulo": (0x52, 'U16', "Modulo Size (generic)"),
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"vpLevel": (0x54, 'U0.16', "Output (analog) attenuation (unsigned)"),
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"vpOffset": (0x56, 'S1.15', "Output (analog) offset (signed)"),
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"vpMask": (0x58, 'U16', "Translate source modulo mask"),
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"vpRatio": (0x5a, 'U16.16', "Translate command ratio (phase step)"),
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"vpMark": (0x5e, 'U16', "Mark count/phase (ticks/step)"),
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"vpSpace": (0x60, 'U16', "Space count/phase (ticks/step)"),
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"vpRise": (0x82, 'U16', "Rising edge clock (channel 1) phase (ticks)"),
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"vpFall": (0x84, 'U16', "Falling edge clock (channel 1) phase (ticks)"),
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"vpControl": (0x86, 'U8', "Clock Control Register (channel 1)"),
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"vpRise2": (0x88, 'U16', "Rising edge clock (channel 2) phase (ticks)"),
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"vpFall2": (0x8a, 'U16', "Falling edge clock (channel 2) phase (ticks)"),
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"vpControl2": (0x8c, 'U8', "Clock Control Register (channel 2)"),
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"vpRise3": (0x8e, 'U16', "Rising edge clock (channel 3) phase (ticks)"),
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"vpFall3": (0x90, 'U16', "Falling edge clock (channel 3) phase (ticks)"),
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"vpControl3": (0x92, 'U8', "Clock Control Register (channel 3)"),
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"vrEepromData": (0x10, 'U8', "EE Data Register"),
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"vrEepromAddress": (0x11, 'U8', "EE Address Register"),
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"vrConverterLo": (0x64, 'U16', "VRB ADC Range Bottom (D Trace Mode)"),
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"vrConverterHi": (0x66, 'U16', "VRB ADC Range Top (D Trace Mode)"),
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"vrTriggerLevel": (0x68, 'U16', "Trigger Level (comparator, unsigned)"),
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"vrLogicControl": (0x74, 'U8', "Logic Control"),
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"vrRest": (0x78, 'U16', "DAC (rest) level"),
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"vrKitchenSinkA": (0x7b, 'U8', "Kitchen Sink Register A"),
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"vrKitchenSinkB": (0x7c, 'U8', "Kitchen Sink Register B"),
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"vpMap0": (0x94, 'U8', "Peripheral Pin Select Channel 0"),
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"vpMap1": (0x95, 'U8', "Peripheral Pin Select Channel 1"),
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"vpMap2": (0x96, 'U8', "Peripheral Pin Select Channel 2"),
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"vpMap3": (0x97, 'U8', "Peripheral Pin Select Channel 3"),
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"vpMap4": (0x98, 'U8', "Peripheral Pin Select Channel 4"),
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"vpMap5": (0x99, 'U8', "Peripheral Pin Select Channel 5"),
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"vpMap6": (0x9a, 'U8', "Peripheral Pin Select Channel 6"),
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"vpMap7": (0x9b, 'U8', "Peripheral Pin Select Channel 7"),
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"vrMasterClockN": (0xf7, 'U8', "PLL prescale (DIV N)"),
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"vrMasterClockM": (0xf8, 'U16', "PLL multiplier (MUL M)"),
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"vrLedLevelRED": (0xfa, 'U8', "Red LED Intensity (VM10 only)"),
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"vrLedLevelGRN": (0xfb, 'U8', "Green LED Intensity (VM10 only)"),
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"vrLedLevelYEL": (0xfc, 'U8', "Yellow LED Intensity (VM10 only)"),
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"vcBaudHost": (0xfe, 'U16', "baud rate (host side)"),
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"TriggerLogic": (0x05, 'U8', "Trigger Logic, one bit per channel (0 => Low, 1 => High)"),
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"TriggerMask": (0x06, 'U8', "Trigger Mask, one bit per channel (0 => Don’t Care, 1 => Active)"),
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"SpockOption": (0x07, 'U8', "Spock Option Register (see bit definition table for details)"),
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"SampleAddress": (0x08, 'U24', "Sample address (write) 24 bit"),
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"SampleCounter": (0x0b, 'U24', "Sample address (read) 24 bit"),
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"TriggerIntro": (0x32, 'U24', "Edge trigger intro filter counter (samples/2)"),
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"TriggerOutro": (0x34, 'U16', "Edge trigger outro filter counter (samples/2)"),
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"TriggerValue": (0x44, 'S16', "Digital (comparator) trigger (signed)"),
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"TriggerTime": (0x40, 'U32', "Stopwatch trigger time (ticks)"),
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"ClockTicks": (0x2e, 'U16', "Master Sample (clock) period (ticks)"),
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"ClockScale": (0x14, 'U16', "Clock divide by N (low byte)"),
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"TraceOption": (0x20, 'U8', "Trace Mode Option bits"),
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"TraceMode": (0x21, 'U8', "Trace Mode (see Trace Mode Table)"),
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"TraceIntro": (0x26, 'U16', "Pre-trigger capture count (samples)"),
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"TraceDelay": (0x22, 'U32', "Delay period (uS)"),
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"TraceOutro": (0x2a, 'U16', "Post-trigger capture count (samples)"),
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"Timeout": (0x2c, 'U16', "Auto trace timeout (auto-ticks)"),
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"Prelude": (0x3a, 'U16', "Buffer prefill value"),
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"BufferMode": (0x31, 'U8', "Buffer mode"),
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"DumpMode": (0x1e, 'U8', "Dump mode"),
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"DumpChan": (0x30, 'U8', "Dump (buffer) Channel (0..127,128..254,255)"),
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"DumpSend": (0x18, 'U16', "Dump send (samples)"),
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"DumpSkip": (0x1a, 'U16', "Dump skip (samples)"),
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"DumpCount": (0x1c, 'U16', "Dump size (samples)"),
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"DumpRepeat": (0x16, 'U16', "Dump repeat (iterations)"),
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"StreamIdent": (0x36, 'U8', "Stream data token"),
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"StampIdent": (0x3c, 'U8', "Timestamp token"),
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"AnalogEnable": (0x37, 'U8', "Analog channel enable (bitmap)"),
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"DigitalEnable": (0x38, 'U8', "Digital channel enable (bitmap)"),
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"SnoopEnable": (0x39, 'U8', "Frequency (snoop) channel enable (bitmap)"),
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"Cmd": (0x46, 'U8', "Command Vector"),
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"Mode": (0x47, 'U8', "Operation Mode (per command)"),
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"Option": (0x48, 'U16', "Command Option (bits fields per command)"),
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"Size": (0x4a, 'U16', "Operation (unit/block) size"),
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"Index": (0x4c, 'U16', "Operation index (eg, P Memory Page)"),
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"Address": (0x4e, 'U16', "General purpose address"),
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"Clock": (0x50, 'U16', "Sample (clock) period (ticks)"),
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"Modulo": (0x52, 'U16', "Modulo Size (generic)"),
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"Level": (0x54, 'U0.16', "Output (analog) attenuation (unsigned)"),
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"Offset": (0x56, 'S1.15', "Output (analog) offset (signed)"),
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"Mask": (0x58, 'U16', "Translate source modulo mask"),
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"Ratio": (0x5a, 'U16.16', "Translate command ratio (phase step)"),
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"Mark": (0x5e, 'U16', "Mark count/phase (ticks/step)"),
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"Space": (0x60, 'U16', "Space count/phase (ticks/step)"),
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"Rise": (0x82, 'U16', "Rising edge clock (channel 1) phase (ticks)"),
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"Fall": (0x84, 'U16', "Falling edge clock (channel 1) phase (ticks)"),
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"Control": (0x86, 'U8', "Clock Control Register (channel 1)"),
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"Rise2": (0x88, 'U16', "Rising edge clock (channel 2) phase (ticks)"),
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"Fall2": (0x8a, 'U16', "Falling edge clock (channel 2) phase (ticks)"),
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"Control2": (0x8c, 'U8', "Clock Control Register (channel 2)"),
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"Rise3": (0x8e, 'U16', "Rising edge clock (channel 3) phase (ticks)"),
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"Fall3": (0x90, 'U16', "Falling edge clock (channel 3) phase (ticks)"),
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"Control3": (0x92, 'U8', "Clock Control Register (channel 3)"),
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"EepromData": (0x10, 'U8', "EE Data Register"),
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"EepromAddress": (0x11, 'U8', "EE Address Register"),
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"ConverterLo": (0x64, 'U0.16', "VRB ADC Range Bottom (D Trace Mode)"),
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"ConverterHi": (0x66, 'U0.16', "VRB ADC Range Top (D Trace Mode)"),
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"TriggerLevel": (0x68, 'U16', "Trigger Level (comparator, unsigned)"),
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"LogicControl": (0x74, 'U8', "Logic Control"),
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"Rest": (0x78, 'U16', "DAC (rest) level"),
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"KitchenSinkA": (0x7b, 'U8', "Kitchen Sink Register A"),
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"KitchenSinkB": (0x7c, 'U8', "Kitchen Sink Register B"),
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"Map0": (0x94, 'U8', "Peripheral Pin Select Channel 0"),
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"Map1": (0x95, 'U8', "Peripheral Pin Select Channel 1"),
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"Map2": (0x96, 'U8', "Peripheral Pin Select Channel 2"),
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"Map3": (0x97, 'U8', "Peripheral Pin Select Channel 3"),
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"Map4": (0x98, 'U8', "Peripheral Pin Select Channel 4"),
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"Map5": (0x99, 'U8', "Peripheral Pin Select Channel 5"),
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"Map6": (0x9a, 'U8', "Peripheral Pin Select Channel 6"),
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"Map7": (0x9b, 'U8', "Peripheral Pin Select Channel 7"),
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"MasterClockN": (0xf7, 'U8', "PLL prescale (DIV N)"),
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"MasterClockM": (0xf8, 'U16', "PLL multiplier (MUL M)"),
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}
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@ -103,7 +100,7 @@ class TraceMode:
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MacroChop = 19
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class BufferModes:
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class BufferMode:
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Single = 0
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Chop = 1
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Dual = 2
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@ -111,15 +108,23 @@ class BufferModes:
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Macro = 4
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MacroChop = 5
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class DumpMode:
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Raw = 0
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Burst = 1
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Summed = 2
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MinMax = 3
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AndOr = 4
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Native = 5
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Filter = 6
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Span = 7
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class SpockOptions:
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TriggerInvert = 0x40
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TriggerSourceA = 0x00
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TriggerSourceB = 0x04
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TriggerSwap = 0x02
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TriggerSampledAnalog = 0x00
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TriggerHardware = 0x01
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class SpockOption:
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TriggerInvert = 0x40
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TriggerSourceA = 0x04 * 0
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TriggerSourceB = 0x04 * 1
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TriggerSwap = 0x02
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TriggerTypeSampledAnalog = 0x01 * 0
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TriggerTypeHardwareComparator = 0x01 * 1
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class KitchenSinkA:
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ChannelAComparatorEnable = 0x80
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@ -130,6 +135,46 @@ class KitchenSinkB:
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WaveformGeneratorEnable = 0x40
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def encode(value, dtype):
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sign = dtype[0]
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if '.' in dtype:
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whole, fraction = map(int, dtype[1:].split('.', 1))
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width = whole + fraction
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value = int(round(value * (1 << fraction)))
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else:
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width = int(dtype[1:])
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if sign == 'U':
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n = 1 << width
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value = max(0, min(value, n-1))
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bs = struct.pack('<I', value)
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elif sign == 'S':
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n = 1 << (width - 1)
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value = max(-n, min(value, n-1))
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bs = struct.pack('<i', value)
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else:
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raise TypeError("Unrecognised type")
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return bs[:width//8]
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def decode(bs, dtype):
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if len(bs) < 4:
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bs = bs + bytes(4 - len(bs))
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sign = dtype[0]
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if sign == 'U':
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value = struct.unpack('<I', bs)[0]
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elif sign == 'S':
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value = struct.unpack('<i', bs)[0]
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if '.' in dtype:
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whole, fraction = map(int, dtype[1:].split('.', 1))
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value = value / (1 << fraction)
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return value
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def calculate_width(dtype):
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if '.' in dtype:
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return sum(map(int, dtype[1:].split('.', 1))) // 8
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else:
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return int(dtype[1:]) // 8
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class VirtualMachine:
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class Transaction:
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@ -159,17 +204,15 @@ class VirtualMachine:
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cmd = cmd.encode('ascii')
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if not self._transactions:
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await self._stream.write(cmd)
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await self._stream.readuntil(cmd)
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echo = await self._stream.readexactly(len(cmd))
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if echo != cmd:
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raise RuntimeError("Mismatched response")
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else:
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self._transactions[-1].append(cmd)
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async def read_reply(self):
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return (await self.read_replies(1))[0]
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async def read_replies(self, n):
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if self._transactions:
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raise TypeError("Command transaction in progress")
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await self._stream.readuntil(b'\r')
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replies = []
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for i in range(n):
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replies.append((await self._stream.readuntil(b'\r'))[:-1])
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@ -181,52 +224,12 @@ class VirtualMachine:
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await self._stream.write(b'!')
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await self._stream.readuntil(b'!')
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def encode(self, value, dtype):
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sign = dtype[0]
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if '.' in dtype:
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whole, fraction = map(int, dtype[1:].split('.', 1))
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width = whole + fraction
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value = int(round(value * (1 << fraction)))
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else:
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width = int(dtype[1:])
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if sign == 'U':
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n = 1 << width
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value = max(0, min(value, n-1))
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bs = struct.pack('<I', value)
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elif sign == 'S':
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n = 1 << (width - 1)
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value = max(-n, min(value, n-1))
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bs = struct.pack('<i', value)
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else:
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raise TypeError("Unrecognised type")
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return bs[:width//8]
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def decode(self, bs, dtype):
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if dtype == 'int':
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return struct.unpack('<i', bs)[0]
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elif dtype == 'uint':
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return struct.unpack('<I', bs)[0]
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elif dtype.startswith('fixed.'):
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fraction_bits = int(dtype[6:])
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return struct.unpack('<i', bs)[0] / (1<<fraction_bits)
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elif dtype.startswith('ufixed.'):
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fraction_bits = int(dtype[7:])
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return struct.unpack('<I', bs)[0] / (1<<fraction_bits)
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else:
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raise TypeError("Unrecognised type")
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def calculate_width(self, dtype):
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if '.' in dtype:
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return sum(map(int, dtype[1:].split('.', 1))) // 8
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else:
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return int(dtype[1:]) // 8
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async def set_registers(self, **kwargs):
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cmd = ''
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r0 = r1 = None
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for base, name in sorted((Registers[name][0], name) for name in kwargs):
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base, dtype, desc = Registers[name]
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for i, byte in enumerate(self.encode(kwargs[name], dtype)):
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for i, byte in enumerate(encode(kwargs[name], dtype)):
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if cmd:
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cmd += 'z'
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r1 += 1
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@ -247,12 +250,12 @@ class VirtualMachine:
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base, dtype, desc = Registers[name]
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await self.issue('{:02x}@p'.format(base))
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values = []
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width = self.calculate_width(dtype)
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width = calculate_width(dtype)
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for i in range(width):
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values.append(int(await self.read_reply(), 16))
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if i < width-1:
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await self.issue(b'np')
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return self.decode(bytes(values), dtype)
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return decode(bytes(values), dtype)
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async def issue_get_revision(self):
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await self.issue(b'?')
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@ -279,13 +282,21 @@ class VirtualMachine:
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await self.issue(b'S')
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async def issue_analog_dump_binary(self):
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await self.issue(b'S')
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await self.issue(b'A')
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async def issue_wavetable_read(self):
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await self.issue(b'R')
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async def wavetable_write(self, byte):
|
||||
await self.issue('{:02x}W'.format(byte))
|
||||
async def wavetable_write_bytes(self, bs):
|
||||
cmd = ''
|
||||
last_byte = None
|
||||
for byte in bs:
|
||||
if byte != last_byte:
|
||||
cmd += '{:02x}'.format(byte)
|
||||
cmd += 'W'
|
||||
last_byte = byte
|
||||
if cmd:
|
||||
await self.issue(cmd)
|
||||
|
||||
async def issue_synthesize_wavetable(self):
|
||||
await self.issue(b'Y')
|
||||
|
||||
Reference in New Issue
Block a user