mirror of
https://github.com/jonathanhogg/scopething
synced 2025-07-14 03:02:09 +01:00
Large part of capture working
This commit is contained in:
Jonathan Hogg
243
scope.py
243
scope.py
@ -1,7 +1,8 @@
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import asyncio
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from streams import SerialStream
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import struct
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import streams
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import vm
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@ -9,7 +10,7 @@ class Scope(vm.VirtualMachine):
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@classmethod
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async def connect(cls, stream=None):
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scope = cls(stream if stream is not None else SerialStream())
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scope = cls(stream if stream is not None else streams.SerialStream())
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await scope.setup()
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return scope
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@ -19,98 +20,230 @@ class Scope(vm.VirtualMachine):
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async def setup(self):
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await self.reset()
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await self.issue_get_revision()
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revision = (await self.read_reply()).decode('ascii')
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revision = ((await self.read_replies(2))[1]).decode('ascii')
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if revision.startswith('BS0005'):
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self.awg_clock_period = 25e-9
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self.awg_wavetable_size = 1024
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self.awg_sample_buffer_size = 1024
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self.awg_minimum_clock = 33
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self.awg_maximum_voltage = 3.3
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self.analog_low = -5.6912
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self.analog_high = 8.0048
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self.analog_range = self.analog_high - self.analog_low
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self.capture_clock_period = 25e-9
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self.capture_buffer_size = 12*1024
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self.trigger_timeout_tick = 6.4e-6
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#self.analog_range = 136.96
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#self.analog_zero = 71.923
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async def generate_waveform(self, frequency, waveform='sine', ratio=0.5, vpp=None, offset=0, min_samples=40, max_error=0.0001):
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async def capture(self, channels=['A'], trigger_channel=None, trigger_level=0, trigger_direction=+1,
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period=1e-3, nsamples=1000, timeout=None, low=None, high=None):
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if 'A' in channels and 'B' in channels:
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nsamples_multiplier = 2
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else:
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nsamples_multiplier = 1
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ticks = int(period / nsamples / nsamples_multiplier / self.capture_clock_period)
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if ticks >= 40 and ticks < 65536:
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sample_width = 2
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buffer_width = 6*1024
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dump_mode = vm.DumpMode.Native
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if 'A' in channels and 'B' in channels:
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trace_mode = vm.TraceMode.MacroChop
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buffer_mode = vm.BufferMode.MacroChop
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else:
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trace_mode = vm.TraceMode.Macro
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buffer_mode = vm.BufferMode.Macro
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elif ticks >= 15 and ticks < 40:
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sample_width = 1
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buffer_width = 12*1024
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dump_mode = vm.DumpMode.Raw
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if 'A' in channels and 'B' in channels:
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trace_mode = vm.TraceMode.AnalogChop
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buffer_mode = vm.BufferMode.Chop
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else:
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trace_mode = vm.TraceMode.Analog
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buffer_mode = vm.BufferMode.Single
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elif ticks >= 8 and ticks < 15:
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sample_width = 1
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buffer_width = 12*1024
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dump_mode = vm.DumpMode.Raw
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if 'A' in channels and 'B' in channels:
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trace_mode = vm.TraceMode.AnalogFastChop
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buffer_mode = vm.BufferMode.Chop
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else:
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trace_mode = vm.TraceMode.AnalogFast
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buffer_mode = vm.BufferMode.Single
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elif ticks >= 2 and ticks < 8:
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if ticks > 5:
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ticks = 5
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sample_width = 1
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buffer_width = 12*1024
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dump_mode = vm.DumpMode.Raw
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if 'A' in channels and 'B' in channels:
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trace_mode = vm.TraceMode.AnalogShotChop
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buffer_mode = vm.BufferMode.Chop
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else:
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trace_mode = vm.TraceMode.AnalogShot
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buffer_mode = vm.BufferMode.Single
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else:
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raise RuntimeError("Unsupported clock period: {}".format(ticks))
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nsamples = int(round(period / ticks / nsamples_multiplier / self.capture_clock_period))
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total_samples = nsamples * nsamples_multiplier
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assert total_samples <= buffer_width
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print(ticks, nsamples, nsamples_multiplier, sample_width)
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if low is None:
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low = self.analog_low
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if high is None:
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high = self.analog_high
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print((low - self.analog_low) / self.analog_range, (high - self.analog_low) / self.analog_range)
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if trigger_channel is None:
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trigger_channel = channels[0]
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else:
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assert trigger_channel in channels
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if trigger_channel == 'A':
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kitchen_sink_a = vm.KitchenSinkA.ChannelAComparatorEnable
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spock_option = vm.SpockOption.TriggerSourceA | vm.SpockOption.TriggerTypeHardwareComparator
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elif trigger_channel == 'B':
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kitchen_sink_a = vm.KitchenSinkA.ChannelBComparatorEnable
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spock_option = vm.SpockOption.TriggerSourceB | vm.SpockOption.TriggerTypeHardwareComparator
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trigger_level = int(round(trigger_level - low) / (high - low) * 65536)
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analog_enable = 0
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if 'A' in channels:
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analog_enable |= 1
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if 'B' in channels:
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analog_enable |= 2
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if timeout is None:
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timeout = period * 5
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async with self.transaction():
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await self.set_registers(TraceMode=trace_mode, ClockTicks=ticks, ClockScale=1,
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TraceIntro=total_samples//4, TraceOutro=total_samples//4, TraceDelay=0,
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Timeout=int(round(timeout / self.trigger_timeout_tick)),
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TriggerMask=0x7f, TriggerLogic=0x80, TriggerValue=0,
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TriggerLevel=trigger_level, TriggerIntro=4, TriggerOutro=4,
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SpockOption=spock_option, Prelude=0,
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ConverterLo=(low - self.analog_low) / self.analog_range,
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ConverterHi=(high - self.analog_low) / self.analog_range,
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KitchenSinkA=kitchen_sink_a,
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KitchenSinkB=vm.KitchenSinkB.AnalogFilterEnable | vm.KitchenSinkB.WaveformGeneratorEnable,
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AnalogEnable=analog_enable, BufferMode=buffer_mode, SampleAddress=0)
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await self.issue_program_spock_registers()
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await self.issue_configure_device_hardware()
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await self.issue_triggered_trace()
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while True:
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code, timestamp = await self.read_replies(2)
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code = int(code.decode('ascii'), 16)
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timestamp = int(timestamp.decode('ascii'), 16)
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if code == 2:
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start_timestamp = timestamp
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else:
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end_timestamp = timestamp
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break
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address = int((await self.read_replies(1))[0].decode('ascii'), 16) // nsamples_multiplier
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print(code, (end_timestamp - start_timestamp) * 25e-9, address)
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traces = {}
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for channel in channels:
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dump_channel = {'A': 0, 'B': 1}[channel]
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async with self.transaction():
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await self.set_registers(SampleAddress=(address - nsamples) * nsamples_multiplier % buffer_width,
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DumpMode=dump_mode, DumpChan=dump_channel,
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DumpCount=nsamples, DumpRepeat=1, DumpSend=1, DumpSkip=0)
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await self.issue_program_spock_registers()
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await self.issue_analog_dump_binary()
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data = await self._stream.readexactly(nsamples * sample_width)
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if sample_width == 2:
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trace = [(value / 65536 + 0.5) * (high - low) + low for value in struct.unpack('>{}h'.format(nsamples), data)]
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else:
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trace = [value / 256 * (high - low) + low for value in data]
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traces[channel] = trace
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return traces
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async def start_generator(self, frequency, waveform='sine', wavetable=None, ratio=0.5, vpp=None, offset=0,
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min_samples=50, max_error=1e-4):
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if vpp is None:
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vpp = self.awg_maximum_voltage
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best_width, best_params = None, None
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clock = self.awg_minimum_clock
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while True:
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possible_params = []
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max_clock = int(round(1 / frequency / min_samples / self.awg_clock_period, 0))
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for clock in range(self.awg_minimum_clock, max_clock+1):
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width = 1 / frequency / (clock * self.awg_clock_period)
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if width <= self.awg_sample_buffer_size:
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nwaves = int(self.awg_sample_buffer_size / width)
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size = int(round(nwaves * width))
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width = size / nwaves
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if width < min_samples:
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break
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actualf = 1 / (size / nwaves * clock * self.awg_clock_period)
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if abs(frequency - actualf) / frequency < max_error and (best_width is None or width > best_width):
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best_width, best_params = width, (size, nwaves, clock, actualf)
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actualf = 1 / (width * clock * self.awg_clock_period)
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error = abs(frequency - actualf) / frequency
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if error < max_error:
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possible_params.append(((error == 0, width), (size, nwaves, clock, actualf)))
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clock += 1
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if best_params is None:
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raise ValueError("Unable to find appropriate solution to required frequency")
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size, nwaves, clock, actualf = best_params
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if not possible_params:
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raise ValueError("No solution to required frequency/min_samples/max_error")
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size, nwaves, clock, actualf = sorted(possible_params)[-1][1]
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print(len(possible_params), size, nwaves, clock, actualf)
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async with self.transaction():
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await self.set_registers(vrKitchenSinkB=vm.KitchenSinkB.WaveformGeneratorEnable)
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if wavetable is None:
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mode = {'sine': 0, 'sawtooth': 1, 'exponential': 2, 'square': 3}[waveform.lower()]
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await self.set_registers(Cmd=0, Mode=mode, Ratio=ratio)
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await self.issue_synthesize_wavetable()
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else:
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if len(wavetable) != self.awg_wavetable_size:
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raise ValueError("Wavetable data must be {} samples".format(self.awg_wavetable_size))
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await self.set_registers(Cmd=0, Mode=1, Address=0, Size=1)
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await self.wavetable_write_bytes(wavetable)
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await self.set_registers(Cmd=0, Mode=0, Level=vpp/self.awg_maximum_voltage,
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Offset=2*offset/self.awg_maximum_voltage,
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Ratio=nwaves * self.awg_wavetable_size / size,
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Index=0, Address=0, Size=size)
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await self.issue_translate_wavetable()
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await self.set_registers(Cmd=2, Mode=0, Clock=clock, Modulo=size,
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Mark=10, Space=1, Rest=0x7f00, Option=0x8004)
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await self.issue_control_waveform_generator()
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await self.set_registers(KitchenSinkB=vm.KitchenSinkB.WaveformGeneratorEnable)
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await self.issue_configure_device_hardware()
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await self.synthesize_wavetable(waveform, ratio)
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await self.translate_wavetable(nwaves=nwaves, size=size, level=vpp/self.awg_maximum_voltage, offset=offset/self.awg_maximum_voltage)
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await self.start_waveform_generator(clock=clock, modulo=size, mark=10, space=2, rest=0x7f00, option=0x8004)
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await self.issue('.')
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return actualf
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async def stop_generator(self):
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await self.stop_waveform_generator()
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async with self.transaction():
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await self.set_registers(vrKitchenSinkB=0)
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await self.set_registers(Cmd=1, Mode=0)
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await self.issue_control_waveform_generator()
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await self.set_registers(KitchenSinkB=0)
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await self.issue_configure_device_hardware()
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async def read_wavetable(self):
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with self.transaction():
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self.set_registers(vpAddress=0, vpSize=self.awg_wavetable_size)
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self.set_registers(Address=0, Size=self.awg_wavetable_size)
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self.issue_wavetable_read()
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return list(self.read_exactly(self.awg_wavetable_size))
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async def write_wavetable(self, data):
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if len(data) != self.awg_wavetable_size:
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raise ValueError("Wavetable data must be {} samples".format(self.awg_wavetable_size))
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with self.transaction():
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self.set_registers(vpAddress=0, vpSize=1)
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for byte in data:
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self.wavetable_write(byte)
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async def synthesize_wavetable(self, waveform='sine', ratio=0.5):
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mode = {'sine': 0, 'sawtooth': 1, 'exponential': 2, 'square': 3}[waveform.lower()]
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async with self.transaction():
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await self.set_registers(vpCmd=0, vpMode=mode, vpRatio=ratio)
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await self.issue_synthesize_wavetable()
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async def translate_wavetable(self, nwaves, size, level=1, offset=0, index=0, address=0):
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async with self.transaction():
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await self.set_registers(vpCmd=0, vpMode=0, vpLevel=level, vpOffset=offset,
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vpRatio=nwaves * self.awg_wavetable_size / size,
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vpIndex=index, vpAddress=address, vpSize=size)
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await self.issue_translate_wavetable()
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async def start_waveform_generator(self, clock, modulo, mark, space, rest, option):
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async with self.transaction():
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await self.set_registers(vpCmd=2, vpMode=0, vpClock=clock, vpModulo=modulo,
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vpMark=mark, vpSpace=space, vrRest=rest, vpOption=option)
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await self.issue_control_waveform_generator()
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async def read_eeprom(self, address):
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async with self.transaction():
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await self.set_registers(vrEepromAddress=address)
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await self.set_registers(EepromAddress=address)
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await self.issue_read_eeprom()
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return int(await self.read_reply(), 16)
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return int((await self.read_replies(2))[1], 16)
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async def write_eeprom(self, address, byte):
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async with self.transaction():
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await self.set_registers(vrEepromAddress=address, vrEepromData=byte)
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await self.set_registers(EepromAddress=address, EepromData=byte)
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await self.issue_write_eeprom()
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return int(await self.read_reply(), 16)
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return int((await self.read_replies(2))[1], 16)
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async def main():
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global s
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import numpy as np
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global s, x, y, data
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s = await Scope.connect()
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print(await s.generate_waveform(440*16, 'sawtooth'))
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x = np.linspace(0, 2*np.pi, s.awg_wavetable_size, endpoint=False)
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y = np.round((np.sin(x)**5)*127 + 128, 0).astype('uint8')
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print(await s.start_generator(5000, wavetable=y))
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#print(await s.start_generator(10000, waveform='square', vpp=3, offset=-0.15))
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def capture(*args, **kwargs):
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import pandas as pd
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return pd.DataFrame(asyncio.get_event_loop().run_until_complete(s.capture(*args, **kwargs)))
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if __name__ == '__main__':
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13
streams.py
13
streams.py
@ -1,9 +1,12 @@
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import asyncio
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import logging
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import os
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import serial
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import serial.tools.list_ports
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import time
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Log = logging.getLogger('streams')
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class SerialStream:
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@ -16,7 +19,7 @@ class SerialStream:
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self._device = self.available_ports()[port]
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self._connection = serial.Serial(self._device, timeout=0, write_timeout=0, **kwargs)
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self._loop = loop if loop is not None else asyncio.get_event_loop()
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self._input_buffer = b''
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self._input_buffer = bytes()
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def __repr__(self):
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return '<{}:{}>'.format(self.__class__.__name__, self._device)
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@ -37,7 +40,7 @@ class SerialStream:
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def _feed_data(self, data, future):
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n = self._connection.write(data)
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print('{:.3f} -> {}'.format(time.time(), repr(data[:n])))
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Log.debug('Write {}'.format(repr(data[:n])))
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future.set_result(n)
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self._loop.remove_writer(self._connection)
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@ -45,7 +48,7 @@ class SerialStream:
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while True:
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if self._input_buffer:
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if n is None:
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data, self._input_buffer = self._input__buffer, b''
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data, self._input_buffer = self._input_buffer, bytes()
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else:
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data, self._input_buffer = self._input_buffer[:n], self._input_buffer[n:]
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return data
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@ -77,7 +80,7 @@ class SerialStream:
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def _handle_data(self, n, future):
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data = self._connection.read(n if n is not None else self._connection.in_waiting)
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print('{:.3f} <- {}'.format(time.time(), repr(data)))
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Log.debug('Read {}'.format(repr(data)))
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future.set_result(data)
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self._loop.remove_reader(self._connection)
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283
vm.py
283
vm.py
@ -3,83 +3,80 @@ import asyncio
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import numpy as np
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import struct
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Registers = {
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"vrTriggerLogic": (0x05, 'U8', "Trigger Logic, one bit per channel (0 => Low, 1 => High)"),
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"vrTriggerMask": (0x06, 'U8', "Trigger Mask, one bit per channel (0 => Don’t Care, 1 => Active)"),
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"vrSpockOption": (0x07, 'U8', "Spock Option Register (see bit definition table for details)"),
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"vrSampleAddress": (0x08, 'U24', "Sample address (write) 24 bit"),
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"vrSampleCounter": (0x0b, 'U24', "Sample address (read) 24 bit"),
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"vrTriggerIntro": (0x32, 'U24', "Edge trigger intro filter counter (samples/2)"),
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"vrTriggerOutro": (0x34, 'U16', "Edge trigger outro filter counter (samples/2)"),
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"vrTriggerValue": (0x44, 'S16', "Digital (comparator) trigger (signed)"),
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"vrTriggerTime": (0x40, 'U32', "Stopwatch trigger time (ticks)"),
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"vrClockTicks": (0x2e, 'U16', "Master Sample (clock) period (ticks)"),
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"vrClockScale": (0x14, 'U16', "Clock divide by N (low byte)"),
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"vrTraceOption": (0x20, 'U8', "Trace Mode Option bits"),
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"vrTraceMode": (0x21, 'U8', "Trace Mode (see Trace Mode Table)"),
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"vrTraceIntro": (0x26, 'U16', "Pre-trigger capture count (samples)"),
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"vrTraceDelay": (0x22, 'U32', "Delay period (uS)"),
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"vrTraceOutro": (0x2a, 'U16', "Post-trigger capture count (samples)"),
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"vrTimeout": (0x2c, 'U16', "Auto trace timeout (auto-ticks)"),
|
||||
"vrPrelude": (0x3a, 'U16', "Buffer prefill value"),
|
||||
"vrBufferMode": (0x31, 'U8', "Buffer mode"),
|
||||
"vrDumpMode": (0x1e, 'U8', "Dump mode"),
|
||||
"vrDumpChan": (0x30, 'U8', "Dump (buffer) Channel (0..127,128..254,255)"),
|
||||
"vrDumpSend": (0x18, 'U16', "Dump send (samples)"),
|
||||
"vrDumpSkip": (0x1a, 'U16', "Dump skip (samples)"),
|
||||
"vrDumpCount": (0x1c, 'U16', "Dump size (samples)"),
|
||||
"vrDumpRepeat": (0x16, 'U16', "Dump repeat (iterations)"),
|
||||
"vrStreamIdent": (0x36, 'U8', "Stream data token"),
|
||||
"vrStampIdent": (0x3c, 'U8', "Timestamp token"),
|
||||
"vrAnalogEnable": (0x37, 'U8', "Analog channel enable (bitmap)"),
|
||||
"vrDigitalEnable": (0x38, 'U8', "Digital channel enable (bitmap)"),
|
||||
"vrSnoopEnable": (0x39, 'U8', "Frequency (snoop) channel enable (bitmap)"),
|
||||
"vpCmd": (0x46, 'U8', "Command Vector"),
|
||||
"vpMode": (0x47, 'U8', "Operation Mode (per command)"),
|
||||
"vpOption": (0x48, 'U16', "Command Option (bits fields per command)"),
|
||||
"vpSize": (0x4a, 'U16', "Operation (unit/block) size"),
|
||||
"vpIndex": (0x4c, 'U16', "Operation index (eg, P Memory Page)"),
|
||||
"vpAddress": (0x4e, 'U16', "General purpose address"),
|
||||
"vpClock": (0x50, 'U16', "Sample (clock) period (ticks)"),
|
||||
"vpModulo": (0x52, 'U16', "Modulo Size (generic)"),
|
||||
"vpLevel": (0x54, 'U0.16', "Output (analog) attenuation (unsigned)"),
|
||||
"vpOffset": (0x56, 'S1.15', "Output (analog) offset (signed)"),
|
||||
"vpMask": (0x58, 'U16', "Translate source modulo mask"),
|
||||
"vpRatio": (0x5a, 'U16.16', "Translate command ratio (phase step)"),
|
||||
"vpMark": (0x5e, 'U16', "Mark count/phase (ticks/step)"),
|
||||
"vpSpace": (0x60, 'U16', "Space count/phase (ticks/step)"),
|
||||
"vpRise": (0x82, 'U16', "Rising edge clock (channel 1) phase (ticks)"),
|
||||
"vpFall": (0x84, 'U16', "Falling edge clock (channel 1) phase (ticks)"),
|
||||
"vpControl": (0x86, 'U8', "Clock Control Register (channel 1)"),
|
||||
"vpRise2": (0x88, 'U16', "Rising edge clock (channel 2) phase (ticks)"),
|
||||
"vpFall2": (0x8a, 'U16', "Falling edge clock (channel 2) phase (ticks)"),
|
||||
"vpControl2": (0x8c, 'U8', "Clock Control Register (channel 2)"),
|
||||
"vpRise3": (0x8e, 'U16', "Rising edge clock (channel 3) phase (ticks)"),
|
||||
"vpFall3": (0x90, 'U16', "Falling edge clock (channel 3) phase (ticks)"),
|
||||
"vpControl3": (0x92, 'U8', "Clock Control Register (channel 3)"),
|
||||
"vrEepromData": (0x10, 'U8', "EE Data Register"),
|
||||
"vrEepromAddress": (0x11, 'U8', "EE Address Register"),
|
||||
"vrConverterLo": (0x64, 'U16', "VRB ADC Range Bottom (D Trace Mode)"),
|
||||
"vrConverterHi": (0x66, 'U16', "VRB ADC Range Top (D Trace Mode)"),
|
||||
"vrTriggerLevel": (0x68, 'U16', "Trigger Level (comparator, unsigned)"),
|
||||
"vrLogicControl": (0x74, 'U8', "Logic Control"),
|
||||
"vrRest": (0x78, 'U16', "DAC (rest) level"),
|
||||
"vrKitchenSinkA": (0x7b, 'U8', "Kitchen Sink Register A"),
|
||||
"vrKitchenSinkB": (0x7c, 'U8', "Kitchen Sink Register B"),
|
||||
"vpMap0": (0x94, 'U8', "Peripheral Pin Select Channel 0"),
|
||||
"vpMap1": (0x95, 'U8', "Peripheral Pin Select Channel 1"),
|
||||
"vpMap2": (0x96, 'U8', "Peripheral Pin Select Channel 2"),
|
||||
"vpMap3": (0x97, 'U8', "Peripheral Pin Select Channel 3"),
|
||||
"vpMap4": (0x98, 'U8', "Peripheral Pin Select Channel 4"),
|
||||
"vpMap5": (0x99, 'U8', "Peripheral Pin Select Channel 5"),
|
||||
"vpMap6": (0x9a, 'U8', "Peripheral Pin Select Channel 6"),
|
||||
"vpMap7": (0x9b, 'U8', "Peripheral Pin Select Channel 7"),
|
||||
"vrMasterClockN": (0xf7, 'U8', "PLL prescale (DIV N)"),
|
||||
"vrMasterClockM": (0xf8, 'U16', "PLL multiplier (MUL M)"),
|
||||
"vrLedLevelRED": (0xfa, 'U8', "Red LED Intensity (VM10 only)"),
|
||||
"vrLedLevelGRN": (0xfb, 'U8', "Green LED Intensity (VM10 only)"),
|
||||
"vrLedLevelYEL": (0xfc, 'U8', "Yellow LED Intensity (VM10 only)"),
|
||||
"vcBaudHost": (0xfe, 'U16', "baud rate (host side)"),
|
||||
"TriggerLogic": (0x05, 'U8', "Trigger Logic, one bit per channel (0 => Low, 1 => High)"),
|
||||
"TriggerMask": (0x06, 'U8', "Trigger Mask, one bit per channel (0 => Don’t Care, 1 => Active)"),
|
||||
"SpockOption": (0x07, 'U8', "Spock Option Register (see bit definition table for details)"),
|
||||
"SampleAddress": (0x08, 'U24', "Sample address (write) 24 bit"),
|
||||
"SampleCounter": (0x0b, 'U24', "Sample address (read) 24 bit"),
|
||||
"TriggerIntro": (0x32, 'U24', "Edge trigger intro filter counter (samples/2)"),
|
||||
"TriggerOutro": (0x34, 'U16', "Edge trigger outro filter counter (samples/2)"),
|
||||
"TriggerValue": (0x44, 'S16', "Digital (comparator) trigger (signed)"),
|
||||
"TriggerTime": (0x40, 'U32', "Stopwatch trigger time (ticks)"),
|
||||
"ClockTicks": (0x2e, 'U16', "Master Sample (clock) period (ticks)"),
|
||||
"ClockScale": (0x14, 'U16', "Clock divide by N (low byte)"),
|
||||
"TraceOption": (0x20, 'U8', "Trace Mode Option bits"),
|
||||
"TraceMode": (0x21, 'U8', "Trace Mode (see Trace Mode Table)"),
|
||||
"TraceIntro": (0x26, 'U16', "Pre-trigger capture count (samples)"),
|
||||
"TraceDelay": (0x22, 'U32', "Delay period (uS)"),
|
||||
"TraceOutro": (0x2a, 'U16', "Post-trigger capture count (samples)"),
|
||||
"Timeout": (0x2c, 'U16', "Auto trace timeout (auto-ticks)"),
|
||||
"Prelude": (0x3a, 'U16', "Buffer prefill value"),
|
||||
"BufferMode": (0x31, 'U8', "Buffer mode"),
|
||||
"DumpMode": (0x1e, 'U8', "Dump mode"),
|
||||
"DumpChan": (0x30, 'U8', "Dump (buffer) Channel (0..127,128..254,255)"),
|
||||
"DumpSend": (0x18, 'U16', "Dump send (samples)"),
|
||||
"DumpSkip": (0x1a, 'U16', "Dump skip (samples)"),
|
||||
"DumpCount": (0x1c, 'U16', "Dump size (samples)"),
|
||||
"DumpRepeat": (0x16, 'U16', "Dump repeat (iterations)"),
|
||||
"StreamIdent": (0x36, 'U8', "Stream data token"),
|
||||
"StampIdent": (0x3c, 'U8', "Timestamp token"),
|
||||
"AnalogEnable": (0x37, 'U8', "Analog channel enable (bitmap)"),
|
||||
"DigitalEnable": (0x38, 'U8', "Digital channel enable (bitmap)"),
|
||||
"SnoopEnable": (0x39, 'U8', "Frequency (snoop) channel enable (bitmap)"),
|
||||
"Cmd": (0x46, 'U8', "Command Vector"),
|
||||
"Mode": (0x47, 'U8', "Operation Mode (per command)"),
|
||||
"Option": (0x48, 'U16', "Command Option (bits fields per command)"),
|
||||
"Size": (0x4a, 'U16', "Operation (unit/block) size"),
|
||||
"Index": (0x4c, 'U16', "Operation index (eg, P Memory Page)"),
|
||||
"Address": (0x4e, 'U16', "General purpose address"),
|
||||
"Clock": (0x50, 'U16', "Sample (clock) period (ticks)"),
|
||||
"Modulo": (0x52, 'U16', "Modulo Size (generic)"),
|
||||
"Level": (0x54, 'U0.16', "Output (analog) attenuation (unsigned)"),
|
||||
"Offset": (0x56, 'S1.15', "Output (analog) offset (signed)"),
|
||||
"Mask": (0x58, 'U16', "Translate source modulo mask"),
|
||||
"Ratio": (0x5a, 'U16.16', "Translate command ratio (phase step)"),
|
||||
"Mark": (0x5e, 'U16', "Mark count/phase (ticks/step)"),
|
||||
"Space": (0x60, 'U16', "Space count/phase (ticks/step)"),
|
||||
"Rise": (0x82, 'U16', "Rising edge clock (channel 1) phase (ticks)"),
|
||||
"Fall": (0x84, 'U16', "Falling edge clock (channel 1) phase (ticks)"),
|
||||
"Control": (0x86, 'U8', "Clock Control Register (channel 1)"),
|
||||
"Rise2": (0x88, 'U16', "Rising edge clock (channel 2) phase (ticks)"),
|
||||
"Fall2": (0x8a, 'U16', "Falling edge clock (channel 2) phase (ticks)"),
|
||||
"Control2": (0x8c, 'U8', "Clock Control Register (channel 2)"),
|
||||
"Rise3": (0x8e, 'U16', "Rising edge clock (channel 3) phase (ticks)"),
|
||||
"Fall3": (0x90, 'U16', "Falling edge clock (channel 3) phase (ticks)"),
|
||||
"Control3": (0x92, 'U8', "Clock Control Register (channel 3)"),
|
||||
"EepromData": (0x10, 'U8', "EE Data Register"),
|
||||
"EepromAddress": (0x11, 'U8', "EE Address Register"),
|
||||
"ConverterLo": (0x64, 'U0.16', "VRB ADC Range Bottom (D Trace Mode)"),
|
||||
"ConverterHi": (0x66, 'U0.16', "VRB ADC Range Top (D Trace Mode)"),
|
||||
"TriggerLevel": (0x68, 'U16', "Trigger Level (comparator, unsigned)"),
|
||||
"LogicControl": (0x74, 'U8', "Logic Control"),
|
||||
"Rest": (0x78, 'U16', "DAC (rest) level"),
|
||||
"KitchenSinkA": (0x7b, 'U8', "Kitchen Sink Register A"),
|
||||
"KitchenSinkB": (0x7c, 'U8', "Kitchen Sink Register B"),
|
||||
"Map0": (0x94, 'U8', "Peripheral Pin Select Channel 0"),
|
||||
"Map1": (0x95, 'U8', "Peripheral Pin Select Channel 1"),
|
||||
"Map2": (0x96, 'U8', "Peripheral Pin Select Channel 2"),
|
||||
"Map3": (0x97, 'U8', "Peripheral Pin Select Channel 3"),
|
||||
"Map4": (0x98, 'U8', "Peripheral Pin Select Channel 4"),
|
||||
"Map5": (0x99, 'U8', "Peripheral Pin Select Channel 5"),
|
||||
"Map6": (0x9a, 'U8', "Peripheral Pin Select Channel 6"),
|
||||
"Map7": (0x9b, 'U8', "Peripheral Pin Select Channel 7"),
|
||||
"MasterClockN": (0xf7, 'U8', "PLL prescale (DIV N)"),
|
||||
"MasterClockM": (0xf8, 'U16', "PLL multiplier (MUL M)"),
|
||||
}
|
||||
|
||||
|
||||
@ -103,7 +100,7 @@ class TraceMode:
|
||||
MacroChop = 19
|
||||
|
||||
|
||||
class BufferModes:
|
||||
class BufferMode:
|
||||
Single = 0
|
||||
Chop = 1
|
||||
Dual = 2
|
||||
@ -111,15 +108,23 @@ class BufferModes:
|
||||
Macro = 4
|
||||
MacroChop = 5
|
||||
|
||||
class DumpMode:
|
||||
Raw = 0
|
||||
Burst = 1
|
||||
Summed = 2
|
||||
MinMax = 3
|
||||
AndOr = 4
|
||||
Native = 5
|
||||
Filter = 6
|
||||
Span = 7
|
||||
|
||||
class SpockOptions:
|
||||
TriggerInvert = 0x40
|
||||
TriggerSourceA = 0x00
|
||||
TriggerSourceB = 0x04
|
||||
TriggerSwap = 0x02
|
||||
TriggerSampledAnalog = 0x00
|
||||
TriggerHardware = 0x01
|
||||
|
||||
class SpockOption:
|
||||
TriggerInvert = 0x40
|
||||
TriggerSourceA = 0x04 * 0
|
||||
TriggerSourceB = 0x04 * 1
|
||||
TriggerSwap = 0x02
|
||||
TriggerTypeSampledAnalog = 0x01 * 0
|
||||
TriggerTypeHardwareComparator = 0x01 * 1
|
||||
|
||||
class KitchenSinkA:
|
||||
ChannelAComparatorEnable = 0x80
|
||||
@ -130,6 +135,46 @@ class KitchenSinkB:
|
||||
WaveformGeneratorEnable = 0x40
|
||||
|
||||
|
||||
def encode(value, dtype):
|
||||
sign = dtype[0]
|
||||
if '.' in dtype:
|
||||
whole, fraction = map(int, dtype[1:].split('.', 1))
|
||||
width = whole + fraction
|
||||
value = int(round(value * (1 << fraction)))
|
||||
else:
|
||||
width = int(dtype[1:])
|
||||
if sign == 'U':
|
||||
n = 1 << width
|
||||
value = max(0, min(value, n-1))
|
||||
bs = struct.pack('<I', value)
|
||||
elif sign == 'S':
|
||||
n = 1 << (width - 1)
|
||||
value = max(-n, min(value, n-1))
|
||||
bs = struct.pack('<i', value)
|
||||
else:
|
||||
raise TypeError("Unrecognised type")
|
||||
return bs[:width//8]
|
||||
|
||||
def decode(bs, dtype):
|
||||
if len(bs) < 4:
|
||||
bs = bs + bytes(4 - len(bs))
|
||||
sign = dtype[0]
|
||||
if sign == 'U':
|
||||
value = struct.unpack('<I', bs)[0]
|
||||
elif sign == 'S':
|
||||
value = struct.unpack('<i', bs)[0]
|
||||
if '.' in dtype:
|
||||
whole, fraction = map(int, dtype[1:].split('.', 1))
|
||||
value = value / (1 << fraction)
|
||||
return value
|
||||
|
||||
def calculate_width(dtype):
|
||||
if '.' in dtype:
|
||||
return sum(map(int, dtype[1:].split('.', 1))) // 8
|
||||
else:
|
||||
return int(dtype[1:]) // 8
|
||||
|
||||
|
||||
class VirtualMachine:
|
||||
|
||||
class Transaction:
|
||||
@ -159,17 +204,15 @@ class VirtualMachine:
|
||||
cmd = cmd.encode('ascii')
|
||||
if not self._transactions:
|
||||
await self._stream.write(cmd)
|
||||
await self._stream.readuntil(cmd)
|
||||
echo = await self._stream.readexactly(len(cmd))
|
||||
if echo != cmd:
|
||||
raise RuntimeError("Mismatched response")
|
||||
else:
|
||||
self._transactions[-1].append(cmd)
|
||||
|
||||
async def read_reply(self):
|
||||
return (await self.read_replies(1))[0]
|
||||
|
||||
async def read_replies(self, n):
|
||||
if self._transactions:
|
||||
raise TypeError("Command transaction in progress")
|
||||
await self._stream.readuntil(b'\r')
|
||||
replies = []
|
||||
for i in range(n):
|
||||
replies.append((await self._stream.readuntil(b'\r'))[:-1])
|
||||
@ -181,52 +224,12 @@ class VirtualMachine:
|
||||
await self._stream.write(b'!')
|
||||
await self._stream.readuntil(b'!')
|
||||
|
||||
def encode(self, value, dtype):
|
||||
sign = dtype[0]
|
||||
if '.' in dtype:
|
||||
whole, fraction = map(int, dtype[1:].split('.', 1))
|
||||
width = whole + fraction
|
||||
value = int(round(value * (1 << fraction)))
|
||||
else:
|
||||
width = int(dtype[1:])
|
||||
if sign == 'U':
|
||||
n = 1 << width
|
||||
value = max(0, min(value, n-1))
|
||||
bs = struct.pack('<I', value)
|
||||
elif sign == 'S':
|
||||
n = 1 << (width - 1)
|
||||
value = max(-n, min(value, n-1))
|
||||
bs = struct.pack('<i', value)
|
||||
else:
|
||||
raise TypeError("Unrecognised type")
|
||||
return bs[:width//8]
|
||||
|
||||
def decode(self, bs, dtype):
|
||||
if dtype == 'int':
|
||||
return struct.unpack('<i', bs)[0]
|
||||
elif dtype == 'uint':
|
||||
return struct.unpack('<I', bs)[0]
|
||||
elif dtype.startswith('fixed.'):
|
||||
fraction_bits = int(dtype[6:])
|
||||
return struct.unpack('<i', bs)[0] / (1<<fraction_bits)
|
||||
elif dtype.startswith('ufixed.'):
|
||||
fraction_bits = int(dtype[7:])
|
||||
return struct.unpack('<I', bs)[0] / (1<<fraction_bits)
|
||||
else:
|
||||
raise TypeError("Unrecognised type")
|
||||
|
||||
def calculate_width(self, dtype):
|
||||
if '.' in dtype:
|
||||
return sum(map(int, dtype[1:].split('.', 1))) // 8
|
||||
else:
|
||||
return int(dtype[1:]) // 8
|
||||
|
||||
async def set_registers(self, **kwargs):
|
||||
cmd = ''
|
||||
r0 = r1 = None
|
||||
for base, name in sorted((Registers[name][0], name) for name in kwargs):
|
||||
base, dtype, desc = Registers[name]
|
||||
for i, byte in enumerate(self.encode(kwargs[name], dtype)):
|
||||
for i, byte in enumerate(encode(kwargs[name], dtype)):
|
||||
if cmd:
|
||||
cmd += 'z'
|
||||
r1 += 1
|
||||
@ -247,12 +250,12 @@ class VirtualMachine:
|
||||
base, dtype, desc = Registers[name]
|
||||
await self.issue('{:02x}@p'.format(base))
|
||||
values = []
|
||||
width = self.calculate_width(dtype)
|
||||
width = calculate_width(dtype)
|
||||
for i in range(width):
|
||||
values.append(int(await self.read_reply(), 16))
|
||||
if i < width-1:
|
||||
await self.issue(b'np')
|
||||
return self.decode(bytes(values), dtype)
|
||||
return decode(bytes(values), dtype)
|
||||
|
||||
async def issue_get_revision(self):
|
||||
await self.issue(b'?')
|
||||
@ -279,13 +282,21 @@ class VirtualMachine:
|
||||
await self.issue(b'S')
|
||||
|
||||
async def issue_analog_dump_binary(self):
|
||||
await self.issue(b'S')
|
||||
await self.issue(b'A')
|
||||
|
||||
async def issue_wavetable_read(self):
|
||||
await self.issue(b'R')
|
||||
|
||||
async def wavetable_write(self, byte):
|
||||
await self.issue('{:02x}W'.format(byte))
|
||||
async def wavetable_write_bytes(self, bs):
|
||||
cmd = ''
|
||||
last_byte = None
|
||||
for byte in bs:
|
||||
if byte != last_byte:
|
||||
cmd += '{:02x}'.format(byte)
|
||||
cmd += 'W'
|
||||
last_byte = byte
|
||||
if cmd:
|
||||
await self.issue(cmd)
|
||||
|
||||
async def issue_synthesize_wavetable(self):
|
||||
await self.issue(b'Y')
|
||||
|
||||
Reference in New Issue
Block a user